Due to the manufacturing process, all ICs have an input voltage limit. This voltage limit is more inconvenient when you want to use a dc / dc converter (such as a linear regulator) to regulate a high power supply voltage to a lower stable voltage. Adding a FET to the input of a linear regulator creates a dc / dc converter with a wider input voltage range than using the regulator alone. Overvoltage (and consequent power consumption) is reduced on the FET. Figure 1 shows the IRF7601 N-channel MOSFET at the input of the TPS79228 2.8-V, 100-mA, low noise, high PSRR LDO regulator. The two resistors provide a bias voltage for the gate of the MOSFET, and the load current determines the voltage on the source of the MOSFET (ie, the on-resistance of the resistive FET is adjusted to meet the load current requirement). MOSFET selection is based on three criteria: drain-source breakdown voltage, gate drive requirements, and power consumption performance. In this example, the maximum power supply voltage is 15V, and the TPS79228 has a recommended maximum operating input voltage of 5.5V, so a MOSFET with a breakdown voltage of 20V is selected.
In order to determine the minimum bias voltage of the MOSFET gate, a curve chart of the MOSFET drain current (ID) and gate-source voltage (VGS) data sheet is required. As far as the IRF7601 is concerned, these curves indicate that the VGS required for the device to achieve an output current of 100-mA should be slightly lower than 1.5 V. Since the maximum voltage drop of the regulator is 100mV at 100 mA, the input voltage of the regulator must be kept above 2.9V. Therefore, the gate bias of the MOSFET is at least 1.5 V + 2.9 V = 4.4 V, so that when the MOSFET supplies 100mA, its source voltage will not drop below 2.9V. The maximum gate bias voltage is generally the recommended operating voltage of the regulator, or 5.5V. This voltage provides more gate drive than necessary to provide a 1μA quiescent current for the regulator in power-down mode. Although the gate can be biased between 4.4V and 5.5V, a bias voltage of 5.0V should be selected to account for various changes in the threshold voltage. The maximum power consumption of the FET is:
Slopes are another potential noise problem. The ramp is usually generated by capacitor charging (voltage mode) or by sampling from the power switch current (current mode). Generally, voltage-mode ramping is not a problem because the impedance of the capacitor to high-frequency injected signals is small. The current ramp is more tricky because of the rising edge peak, relatively small ramp amplitude, and power stage parasitics.
100 mA x (15 V – 2.9 V) = 1.21 W
IRF7601 in Micro 8 package can make TA = 55 ℃. Therefore, in the case of using TPS79228 and a MOSFET, a 15V power supply can produce a low noise, low ripple 2.8-V output voltage.
Figure 1 MOSFET switch used to extend the input voltage range of the regulator. If the input voltage changes more obviously, although Figure 2 is relatively complicated, it is very necessary. Replace the bottom resistor in Figure 1 with a Zener diode and provide a fixed gate drive for the MOSFET. The selection method of the Zener diode output voltage is similar to the previous explanation.
Figure 2 MOSFET switch used to extend the input voltage range of the regulator using a Zener diode for biasing Both methods are suitable for creating a dc / dc converter with a wider input voltage range than the converter IC allows. A single MOSFET solution is the simplest and cheapest solution. When the power supply is not regulated, a MOSFET biased by a Zener diode is the best choice.
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