The power electronics world made a breakthrough in 1959, when Dawon Kahng and MarTIn Atalla invented metal oxide semiconductor field effect transistors (MOSFETs) at Bell Labs. The first commercial MOSFETs were released five years later, and since then, generations of MOSFET transistors have enabled power supply designers to achieve performance and density levels that were not possible with bipolar early products.
However, in recent years, these improvements have begun to weaken, creating space and demand for the next breakthrough technology. This is where the gallium nitride (GaN) is eye-catching.
As a wideband-gap transistor technology, GaN is creating an exciting opportunity to achieve new levels of performance and efficiency in power electronics systems. The inherent advantage of GaN is that engineers have turned to ways to rethink power density that were not possible before, and now meet the world's growing power demands. In this article, I will explore how to achieve it.
Why choose GaN?When it comes to power density, GaN offers several key advantages and benefits for silicon MOSFETs, including:
• Lower RDS(on): As shown in Table 1, GaN's MOSFET area is half that of RDS(on). This directly reduces the conduction losses in the circuit by 50%. As a result, you can use smaller heat sinks and simpler thermal management in your design.
• Lower gate and output charge: GaN provides lower gate charge. A typical medium voltage device has a gate charge of approximately 1 nC compared to 4 nC of a MOSFET (Table 2). The lower gate charge allows the design to have faster turn-on and slew rates while reducing losses.
Similarly, GaN has a significantly lower output charge (Table 2), which brings a double advantage to each design. First, switching losses are reduced by up to 80%, combined with lower conduction losses, which have a significant and positive impact on power density. Second, depending on the topology and application, the design can operate up to 10 times at higher switching frequencies. This greatly reduces the size of the magnetic material as well as the size and footprint of the design while increasing overall efficiency by 15%.
• Zero-reverse recovery: Silicon MOSFETs have a typical reverse recovery charge in the 50 to 60 nC range, depending on their size and characteristics. When the MOSFET is turned off, the reverse recovery charge (Qrr) in the body diode is lost, which increases the overall system switching losses. These losses are proportional to the switching frequency. As shown in Figure 1, Qrr losses at higher frequencies make MOSFETs impractical in many applications.
1. The reverse recovery charge (Qrr) loss of a MOSFET is much larger at higher frequencies than a GaN alternative.
In contrast, GaN has zero reverse recovery and zero Qrr loss, making GaN FETs ideal for hard-switching applications, as shown in later examples.
Driving GaNRegardless of the type of GaN used, gate drive design is critical to achieving optimal overall performance. A good analogy to a bad gate drive design is the use of street tires on a Formula 1 car.
When designing a gate driver, please note the following key parameters:
• Bias Voltage: It is important to bias the gate to the optimum voltage for optimum switching performance while protecting the gate from potential overvoltage conditions. The bias level varies with the type and GaN manufacturing process and needs to be set accordingly. It is also extremely critical to have a clamp or overvoltage protection circuit.
• Loop inductance: Due to the high slew rate and switching frequency of GaN, any parasitic inductance in the design introduces losses and ringing into the system. Many sources of inductance exist in the design of leads and internal bond wires and printed circuit board (PCB) traces in GaN FET and driver packages. Although it can be reduced, it is difficult to eliminate them. A GaN power stage solution such as the LMG3410 integrates drivers and GaN FETs into a single package, significantly reducing overall inductance.
• Propagation delay: Short propagation delays and good matching (for half-bridge topologies) are important for high frequency operation. A 25 ns propagation delay and a 1 to 2 ns match is a good starting point for high frequency (1 MHz or higher) designs.
2. As evidenced by the GaN switching waveform of the optimized driver design, GaN can operate at very high slew rates and minimize ringing at the switching node.
With the best gate drive design and PCB layout, you can run GaN at very high slew rates ("100 V / ns" to minimize ringing on the switching nodes. Figure 2 shows an example of the switching waveform for this design.
Design example: Next generation PFC solutionDue to its unique characteristics, GaN helps power supply designers overcome the most difficult challenges in terms of power density in different systems and applications. These benefits are not due to the simple replacement of MOSFETs with equivalent GaN in existing designs. GaN makes new circuit topologies and/or operating modes that were previously impossible to implement with silicon MOSFETs a reality. Significant advantages have led to a new generation of smaller and more efficient products. Let's look at an example like this.
Power Factor Correction (PFC) is mandatory in every electrical or electronic product that consumes more than 75W. The PFC is the first power conversion module located between the power supply and the rest of the system and carries the entire load at any given operating point. Therefore, it directly affects the size and efficiency of the entire system.
A generation of products with different topologies have been designed to reduce size while meeting industry standard efficiencies. For example, the efficiency level defined in the 80 Plus requires 96% efficiency for a titanium power source.
3. Dual bridge PFC topologies are typically used in many high power designs.
Many high power systems (> 1 kW) use a dual bridge topology (Figure 3). With the introduction of silicon carbide (SiC) diodes and the latest generation of super-junction MOSFET transistors, we have seen improvements in power density over the past decade. However, these improvements have reached a stagnation period of efficiency and power density.
A significant increase in power density requires an alternative approach:
• Number of power switches
• Number of filter inductors
• Inductor size
• Dimensions of heat sink and cooling element
An alternative is the continuous conduction mode totem pole topology. This topology leverages all of the key features of GaN, resulting in a smaller, more efficient design (Figure 4). Zero reverse recovery of GaN is particularly important to achieve this topology.
4. The totem pole PFC topology reduces the design size while reducing the operating frequency, making full use of zero reverse recovery of GaN.
Table 3 summarizes the main advantages of this bridgeless PFC design and further elaborates:
• Power Switch: The totem pole PFC replaces two super-junction MOSFETs and two SiC diodes with only two GaN devices compared to the dual-bridge topology.
• Filtered inductor: This topology eliminates a large filter inductor in the power stage. The removal of the inductor and the reduction in the number of power switches also increase the reliability of the overall system.
• Size: Since GaN operates at much higher switching frequencies (typically four times that of MOSFETs at 40 to 60 kHz), you can use smaller filter inductors. In addition, the lower switching losses of GaN allow designers to significantly reduce the size of the heat sink in the power stage.
• Efficiency: The designed totem pole PFC has a high efficiency of over 99%. To illustrate this, 1 kW consumes less than 10W during the entire PFC phase.
• Cost: The premium for GaN devices will be higher due to their existing manufacturing costs. However, given the cost savings here, the total system cost should be comparable to existing MOSFET designs.
Modern totem pole designs also utilize digital power controllers to further increase efficiency, total harmonic distortion and other key design parameters. Digital controllers such as the C2000 and UCD3138 intelligently control power stage operation, optimize efficiency in real time, and respond to line and load conditions.
in conclusionWe have seen the growing demand for industries that require higher power such as cloud computing, 5G telecommunications infrastructure, wind and solar power plants, and electric and hybrid vehicles. As silicon MOSFETs reach a stagnation period, designers are exploring wideband gap technologies such as GaN's next design.
As shown in the PFC example, GaN not only improves efficiency, but also greatly reduces the size of the power supply by 30% to 50%. You can use GaN in isolated or non-isolated dc-dc converters, inverters, and other power conversion subsystems to significantly reduce power consumption, part count, weight, and size.
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